ASIC design engineer |
| Compania: SC ASIC ART SRL |
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| Expirat la: 23.08.2005 |
| Actualizat la: 27.09.2004 |
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| Compania: |
SC ASIC ART SRL |
| Departament: |
IT |
| Orasul: |
Iasi
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| Tip Job: |
Full time |
| Posturi disponibile: |
1 |
| Status: |
Inactiv |
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| Nivel cariera: |
Mid-Level/Peste 3 Ani Exp |
| Limbi Straine: |
engleza, |
| Oferta: |
se va negocia in urma interviului |
| Permis conducere: |
nespecificat |
| Data introducerii: |
23.07.2005 |
| Data limita: |
23.08.2005 |
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CANDIDATUL IDEAL:
1 year experience with Cadence (especially Standard Cells automatic place & route flows in technologies deeper than 0,35 um) and one year experience in synthesis using Synopsys and/or Cadence; good understanding of Static Timing Analysis (STA). Not mandatory extra knowledge: physical synthesis; power analysis; crosstalk analysis. |
RESPONSABILITATI / BENEFICII:
- vor fi detaliate la interviu |
DESCRIEREA COMPANIEI:
- companie infiintata in 1997
- clienti numai pe plan international |
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